1. Field of the Invention
The present invention relates to a chip structure. More particularly, the present invention relates to a chip structure having compliant bumps.
2. Description of Related Art
In semiconductor industry, the production of integrated circuits (IC) is mainly divided into three stages: IC design, IC process, and IC package.
In IC process, a chip is completed through wafer process, formation of IC, electrical testing, and wafer sawing, etc. A wafer has an active surface, which generally refers to the surface of the wafer having an active device thereon. When the IC inside the wafer has been completed, a plurality of bonding pads is disposed on the active surface of the wafer so that the chip formed eventually through wafer sawing can be electrically connected to a carrier through the bonding pads.
FIG. 1 is a side view of a conventional chip structure. Referring to FIG. 1, the conventional chip structure 100 includes a substrate 110, a plurality of chip bonding pads 120, a passivation layer 130, and a plurality of conductive bumps 140. The substrate 110 has an active surface 112 whereon the chip bonding pads 120 are disposed. The passivation layer 130 covers the active surface 112 and exposes the chip bonding pads 120. Besides, the conductive bumps 140 are respectively disposed on the chip bonding pads 120 as the media of electrically connecting to a glass substrate (not shown).
However, on the glass substrate, sometimes the electrical contacts (not shown) designed to be electrically connected to the corresponding conductive bumps 140 cannot be completely aligned with the corresponding conductive bumps 140 due to the wiring design or other factors, so that the chip bonding pads 120 cannot be electrically connected to the electrical contacts correspondingly. Thus, further redistribution of the chip bonding pads 120 is necessary.